1. Field of the Invention
The present invention relates to a semiconductor device having a through electrode which pierces a semiconductor substrate, a method of fabricating the same, and further relates to a composite semiconductor device having a plurality of semiconductor devices stacked and integrated therein.
2. Description of the Related Art
In recent years, there are developed composite semiconductor device having a plurality of LSI chips staked and integrated therein. Fabrication of the composite semiconductor device needs formation of a connection electrode so as to pierce the LSI chip. One possible method of the formation is such as forming an opening (through-hole), which reaches an LSI electrode, by etching the semiconductor substrate (wafer) from the back surface thereof by RIE, insulating the back surface of the wafer and inside of the opening at the same time typically by a technique such as the CVD process, and selectively removing the insulating film in a portion corresponded to the electrode at the bottom of the opening. A barrier metal layer such as TaN and TiN is formed in the opening, a film-formed resist is placed on the back surface of the wafer, the resist is removed selectively on the opening by photolithography, and a metal is filled in the opening by the plating process using the barrier metal as a seed.
Another approach ever made is such as forming a deep viahole by RIE or laser processing from the surface of an LSI chip, insulating the inner surface of the viahole, filling a metal typically by plating, grinding and dry-etching the metal from the back surface of the wafer so as to expose the metal at the end of the viahole, to thereby make it as a connection electrode.
[Patent Document 1] Japanese Patent Application Laid-Open No. 2003-78080
[Patent Document 2] Japanese Patent Application Laid-Open No. 62-72161
[Patent Document 3] Japanese Patent Application Laid-Open No. 5-29483